Schedule
| Date | Topic |
|---|---|
| 8/21 | Class Policies Introduction to Data Converters |
| 8/28 | Quiz Advanced Cadence Simulation Behavioral Modeling Using Verilog-A Project 1 Assigned |
| 9/4 | Comparators |
| 9/11 | Quiz Project 1 Due Advanced Comparators Introduction to Switched-Capacitor Circuits |
| 9/19 |
Switched-Capacitor
Amplifiers and Filters |
| 9/25 |
Quiz Sample-and-Hold Circuits |
| 10/2 |
Parallel Nyquist-Rate DACs |
| 10/9 |
Quiz Project 2 Due Improved Parallel Nyquist-Rate DACs Serial DACs |
| 10/16 |
Low- and Medium-Speed Nyquist-Rate ADCs |
| 10/23 |
Quiz High-Speed ADCs |
| 10/30 |
Oversampled Converters |
| 11/6 |
Oversampled
Converters |
| 11/13 |
Quiz Current State of the Art Final Project Design |
| 11/20 |
Current State of the Art Final Project Design |
| 11/27 |
Thanksgiving Break
(No Class) |
| 12/4 |
Current State of the
Art Final Project Design |